A new class of products called convergent systems
that integrate voice, video and data are beginning to emerge in
both portable and desktop types. The new class of portable products
provide real time video, on-demand internet, high performance computing,
speech recognition, sensing and other functions in a system that
fits in the palm of one's hand. The basis of these systems can be
an MCM, System- on- a Chip (SOC), System- in- Package (SIP) or System-
on- Package (SOP). Chipmakers such as Intel, IBM, Toshiba, AMD and
others have invested heavily in IC, leading potentially to SOC-based
systems. Japanese companies, on the other hand, have begun to explore
SIP, a 3D stacking of ICs or IC packages, to leverage their capabilities
in thin film multilayer packaging and in the assembly technology.
Both SOC and SIP are viewed, however, as partial end product systems.
The pioneering SOP approach by Georgia Tech PRC leverages both SIP
and SOC to create the most microminiaturized, multifunctional and
complete end product for convergent systems. It does this through
concurrent system, IC, and Package design, novel materials and processes,
novel interconnection schemes for embedded digital, RF and optoelectronic
functions. The cost benefits come from large area SOP Wafer fabrication
to small area usage of that wafer in a complete end product system,
similar in concept of Wafer to IC. To achieve this, the SOP alliance
proposes four focus areas:
1. SOP design and multi functional systems integration research
2. SOP prototypes with two or more mixed signal functions from design
to reliability
3. Sub system prototypes in digital, optical and RF from design
to fabrication to test and reliability.
4. Explore communication intensive architectures with Optical. RF
and digital IC- Board I/Os.
1) Design and prototype of Mixed Signal Modules with two or more
functions RF and digital interfaces and interactions
Digital and optoelectronics interfaces and interactions
RF and optoelectronic interfaces and interactions
Digital, RF, and optoelectronic interfaces and interactions
2) Design and prototype of Sub-Systems
RF functional prototypes with embedded components and RF MEMS
for high frequency wireless applications above 5.8 GHz.
High
speed digital functional prototypes with signal and power integrity
to support 10-20 GHz clock frequency and 200 watts per chip
with embedded decoupling and advanced global interconnect materials
and processes.
Optoelectronic functional prototypes that incorporate embedded
detectors, waveguides and gratings approaching aggregate data
rates in excess of 1 Tbps.
3) Explore, design and prototype RF, digital and optical IC
to board I/Os
RF interconnection communication between IC's and board
Optoelectronic interconnection communication between IC's and
board
IC to Package with ultrahigh digital I/O connections.
RF Systems: Develop design guidelines and fabricate prototypes
for the integration of embedded functions (antennas, micromachined
RF MEMS structures) in wireless SOP-based transceivers.
Digital Systems: Design and fabrication of digital sub systems
with leading edge materials, processes, structures and fine
pitch IC- board interconnections
Opto Systems: Develop design guidelines and fabricate prototype
boards that integrate embedded opto detectors, waveguides gratings
structures.
3) RF and Optical IC to board I/Os
Communication intensive architectures
Optical and RF I/O approaches
Low -Stress Compliant IC-board interconnections for ultra-high
density I/O
Intelligent Network Communicator (INC) module is designed and
is being fabricated which supports digital, opto, and RF functions.
This module will facilitate understanding of mixed signal interfaces.
System issues addressed include EMI, line delay, noise reduction,
coupling efficiency, materials compatibility, Q factors, etc.
SOP process testbed: Completed design of SOP proof of concept
testbed to assess key enabling packaging technologies for SOP-
based systems. Some of the designs in this most recent testbed
include feature geometries down to 5 um lines and spaces using
stacked via structures, embedded filters and waveguides, compliant
interconnects to support I/O greater than 5000, reworkable underfills,
no lead solder connections, low dielectric constant and low
loss materials, and dual phase cooling.
1. Rao R. Tummala, Kenichi Shintotani, V. Sundaram, Swapan Bhattacharya,
George White, Fuhan Liu, P.M. Raj, Lixi Wan, Seock Hee Lee, D. Ravi,
"SOP vs. SOC at Georgia Tech PRC", Invited Paper in ICEP
2001 Conference, Japan, April 2001.
2. Madhavan Swaminathan, Joe Hobbs, Hitesh Windlass, Venky Sundaram,
Sungjun Chun, George E. White, Rao R. Tummala,
"Simultaneous Switching Noise Suppression for High Speed Systems
Using Embedded Decoupling" ECTC 2002, May 2002 PRC Research
Facilitiesback Class 1000 Cleanroom
for 300mm Substrate Fabrication
Excimer Laser Lithography/Ablation System
Copper/Nickel/Gold Plating
Plasma Treatment Chamber with 5 Gas Capability (Plasma Etch)
Meniscus and Spin Coater, and Vacuum Laminator
Electrical Design & Characterization
Cadence Advanced Package Designer (APD) Suite of EDA Tools
Mixed
Signal Systems
Digital interface design
Optoelectronic interface design
RF/Wireless interface design
Mixed signal testing
Prototype Fabrication
Prof.
Rao Tummala, Alliance Leader, rtummala@ee.gatech.edu
Prof.
Madhavan Swaminathan
Prof. John Papapolymerou
Prof. D. Keezer
Prof. Rao Tummala
Dr. F. Liu
SOP
Sub Systems
RF Subsystem
Optoelectronic subsystem
Digital Subsystem
Fabrication and Assembly
Madhavan
Swaminathan, Team Leader, madhavan.swaminathan@ee.gatech.edu
Prof. John Papapolymerou, Prof. Farokh
Ayazi,
Prof. Rao
Tummala
Prof. Madhavan Swaminathan (co-leader)
Prof. R. Tummala
Prof. C. P. Wong, Dr. F. Liu
RF/Optical
IC to Board IO
Communication Intensive Architecture
Opto IO Communication
RF IO Communication
Gee-Kung Chang, Team Leader, gee-kung.chang@ece.gatech.edu
Prof. Gee-Kung Chang, Prof. R. Tummala
Prof. Gee-Kung Chang
Prof.
R. Tummala
