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Industry's
Strategic Need back
As Microsystems continue to move towards higher speed and micro
miniaturization, the demand for interconnect density both on the
IC and the package increases tremendously. With the move towards
Nano ICs by 2003 with 100nm feature ICs combined with area array
I/Os with pitch as small as 20-100 micron, board wiring densities
of the order of 5000 cm/cm2 are necessary. These ultra-high density
packages have to simultaneously support digital and RF speeds in
the 20-50 GHz range, posing challenges in electrical and mechanical
design, fabrication of 5-10 micron structures with materials of
unprecedented electrical and mechanical properties far beyond today's
FR-4, BT and other boards. All of these requirements have to be
satisfied by an integrated solution for high density, high speed,
low cost and high reliability, necessitating a revolutionary interconnect
methodology combining novel designs, materials, processes, structures
and test methods.
Research
Directions back
The research in this alliance is targeted at
100-20 micron pitch interconnects and high signal speeds of >5
GHz. The following focus areas are being explored.
1. Low K, low loss dielectrics for global interconnects and >5
GHz transmission lines on board
2. Novel low cost process innovations for MGI
3. Microvia and Global interconnect structures with 5-10 micron
geometries for 100-20 micron pitch
4. Low CTE High Modulus Replacements for FR-4, BT substrates
Integrated
Testbed and Deliverables back
The MGI testbed will allow exploration and integration of:
- New
dielectric materials for high speed, high density MGI
- Novel
process methods for global interconnect structures
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Multi layer stacked via structures for highest density interconnections
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Test methodologies for ultra-high density interconnects
- Reliability
modeling and testing of global interconnect and high-density
boards
The MGI testbed deliverables
include the demonstration of 100-20 micron pitch interconnections
for GHz signal speeds on low cost boards.
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Recent
PRC Advances back
- The
team has demonstrated curing of polyimide on low temperature
FR-4 boards for the first time using microwave curing with significant
cycle time reduction.
- A
novel stacked via interconnect structure has been demonstrated
by the team towards highest density multi layer interconnections
with 100-20 um pitch.
- Microvia
processes have been developed for low loss polymer dielectrics
(PPE, LCP) using excimer laser ablation and plasma surface treatment
for electroless copper plating.
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Ultra-fine line lithography down to 6-10 um has been demonstrated
by the PRC team in using low cost photoresists on PWB like substrates.
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Computer models have been developed to predict the thermo-mechanical
reliability of microvias incorporating micron-scale effects
on the material constitutive behavior.
PRC
Research Facilities back
1. Class 1000 Cleanroom with State-of-the-Art Equipment for 300mm
Substrate Fabrication
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Excimer Laser Lithography/Ablation System with 5mm Resolution
(Anvik Corp.)
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Copper/Nickel/Gold Plating System (Atotech, Germany)
- Plasma
Treatment Chamber with 5 Gas Capability (Plasma Etch)
- Meniscus
and Spin Coater, and Vacuum Laminator for Thin Film Polymer
Application
- UV
Contact lithography tools with 5?m resolution (Tamarack Scientific)
- Video
Measurement System for inspection and measurement
- Laser
confocal profilometer (Keyence) and Dektak profilometer for
thickness measurement
Electrical Design & Characterization
- Cadence
Advanced Package Designer (APD) Suite of EDA Tools
- TDR,
VNA capability upto 26GHz
2.
Reliability Chambers - Thermal Shock, Thermal Cycle, Temperature
Humidity Bias, HAST
Selected
Publications back
1. Fuhan Liu, V. Sundaram, George White and Rao
R.Tummala, "Ultra-Fine Photoresist Image Formation for Next
Generation High-Density PWB Substrate", International Journal
of Microcircuits and Packaging, Volume 23, No. 3, pp. 339-345, November
2000.
2. N. R. Grove, P. A. Kohl, S. A. Bidstrup Allen, S. Jayaraman and
R. Shick, "Functionalized polynorbornene dielectric polymers:
adhesion and mechanical properties", Journal of Polymer Science:
Polymer Physics Edition, 37, 3003, 1999.
3. Ramakrishna, G., Pucha, R., and Sitaraman, S. K., "Micro-Scale
Plasticity Effects in Microvia Reliability Analysis", 52nd
Electronic Components and Technology Conference, San Diego, CA,
May 2002.
4. Raj, P. M., Shinotani, K., Seo, M., Zweben, C., Shiva Kumar,
K., Bhattacharya, S., White, G. E., and Tummala, R. R., "Selection
and evaluation of materials for future System-On-Package Substrate",
51st Electronic Components and Technology Conference, pp. 1193-1200,
2001.
5. Stokes D., and May, G., "Real-Time Control of Reactive Ion
Etching Using Neural Networks," IEEE Trans. Semi. Manufac.,
vol. 13, no. 4, pp. 469-480, Nov., 2000.
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| Industry
Partners and Sponsor back
Hitachi Chemical (Japan), Hitachi Limited (Japan),
Matsushita Electric Works (Japan), NSF,STAR(Singapore)
Contact
for Additional Information back
1. Prof. Rao Tummala, Pettit Chair Professor
and PRC Director, MGI Alliance Leader,
(404) 894-9095, rtummala@ece.gatech.ed |
