RESEARCH ADVANCES & INNOVATIONS

Mesoscale Thermal Management Devices Research at Georgia Tech PRC
Improvements in clock speed and functionality of microelectronic devices are resulting in continually increasing chip heat fluxes and volumetric heat generation rates. Within the next decade, the spatially averaged microprocessor heat fluxes are projected to increase by a factor of two, to well over 100 W/cm², with core regions experiencing local heat fluxes that are several times higher. Heat fluxes in power electronics and radar amplifier devices are already approaching 1 kW/cm². A new family of thermal management devices will be needed to address these high heat loads. Search for these solutions is made all the more challenging due to a number of constraints in emerging system architectures. The free space available for the thermal management devices, particularly near the heat generating chips and packages, is shrinking, as systems continue to become more compact. Optical access is often needed to the chips, which limits the number of surfaces available for cooling device attachment. In portable systems, the battery power is at a premium and energy frugal cooling devices are a key requirement. Current air-cooled heat sinks are inadequate to meet these emerging challenges, and reliable and cost-effective new ultra-compact chip/package size, or mesoscale, cooling devices are needed.

Thermal management research at the PRC is targeting the development and characterization of mesoscale cooling devices using single phase liquid cooling and two-phase cooling to achieve the above objectives. In recent research, a stacked configuration of microchannels has been utilized for single phase liquid cooling to handle average heat fluxes of 200 W/cm², with a capability to handle on-chip non uniformities in power. Innovative manifolding and three-dimensional stacking allows the coolant to be brought in near the heat generating regions, get evenly distributed, and discharged, without increasing the footprint of the cooling device. The hot working fluid is then pumped to a remote liquid-to-air heat exchanger for heat rejection to the ambient. In two-phase devices, enhanced pool boiling and vibration-induced droplet atomization have been employed to achieve heat fluxes of around 100 W/cm² using dielectric liquids, and about 200 W/cm² with water. Evaporators constructed using enhanced boiling structures have been incorporated in developing pump-less thermosyphons.

Both the single phase and two-phase flow loops being studied result in meso-scale heat removal devices in contact with the chip or package, where real estate is at a premium. Overall system miniaturization also requires the size of the air-side heat exchangers to be optimized. Currently, efforts are also underway to develop compact single phase heat exchangers and condensers. For further information, contact Profs. Yogendra Joshi (Yogendra.Joshi@me.gatech.edu) or Ari Glezer (Ari.Glezer@me.gatech.edu).

PUBLICATIONS

Thermal Publications in 2004

All PRC publications from 1993-2004 can be searched at: www.ece.gatech.edu/developers/PHP/prc/searchPublications.php

1. “Stacked Microchannel Heat Sinks for Liquid Cooling of Microelectronic Components”, X. Wei and Y. Joshi, ASME Transactions J. Electronic Packaging (in press, 2004).
2. “An Integrated Methodology for Optimal Component Placement and Heat Sink Sizing”, Deepak Gopinath, Yogendra Joshi and Shapour Azarm, IEEE Transactions on Components and Packaging Technologies (accepted, 2004).
3. “ Two-Phase Heat Spreaders Utilizing Microfabricated Boiling Enhancement Structures”, S. Murthy, Y. Joshi, and W. Nakayama , Heat Transfer Engineering, Vol. 25, pp. 26-36, 2004.
4. “Supply Air Distribution From a single Air handling Unit in a Raised Floor Plenum Data Center ”, J.D. Rambo, and Y. Joshi, 6 th ISH MT/ASME Conference, Kalpakkam , India , January 2004.
5. “Interconnect Thermal Management of High Power Packaged Electronic Architecture”, Jason T. Cook, Yogendra K. Joshi, and Ravi Doraiswami Proceedings of SemiTherm 2004, March 2004.
6. “Fluid Flow and Heat Transfer Characteristics of Liquid Cooled Foam Heat Sinks”, H.Y. Zhang, D.Pinjala, Y.Joshi, T.N. Wong, K.C. Toh, M.K.Iyer, Proceedings of ITHERM2004. (Won Best Poster Paper Award), pp 640-647, June 2004.
7. Mahalingam, R., Glezer, A., Bhattacharya, A., and Machiroutu, S., “Forced Air Cooling using Synthetic Jets for Compact Low Profile Electronics” 4th Eurotherm Conference, Birmingham, UK, 2004.
8. Heffington, S.N., and A. Glezer, “Two-Phase Thermal Management using a Smale-Scale, Heat Transfer Cell Based on Vibration-Induced Droplet Atomization,” Ninth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm 2004), Las Vegas, NV, 2004.
9. Heffington, S., Glezer, A., Tillery, S., and Smith, M., “Vibration-Induced Two-Phase Cooling Technologies for High Power Thermal Management, 3rd International Symposium on Two-Phase Flow Modeling and Experimentation Pisa , 2004.
10. Heffington, S. and Glezer, A.,“Enhanced Boiling Heat Transfer By Submerged Ultrasonic Vibrations,” International Workshop on Thermal Investigations of ICs and Systems, THER MINI C Workshop, Cote d’Azur, France, 2004.
11. Mahalingam, R., Rumingy, N., and Glezer, A. “Thermal Management using Synthetic Jet Ejectors,” IEE E Transactions on Components and Packaging Technologies, 27 , 439-444, 2004.

AWARDS & RECOGNITION

Outstanding Student Paper
Jianwen Xu, a graduate student of the PRC has received the Outstanding Student Paper Award for his paper “High Performance Low Cost Metal-Filled Composite for Embedded Passive Applications” given at the 5 th Electronics Packaging Technology Conference (EPTC 2003).

INTERNATIONAL COLLABORATIONS

Georgia Tech PRC & KETI Sign Memorandum of Understanding

The Packaging Research Center (PRC) and the Korea Electronics Technology Institute (KETI) have entered into a Memorandum of Understanding (MOU) for advanced System-on-Package (SOP) research, development, and education. 

The MOU outlines the co-publications and other academic research information, as well as the exchange of personnel as possible short term cooperative activities as part of a larger collaboration. The signing ceremony was attended by Jean-Lou Chameau, provost of Georgia Tech; Rao Tummala, director of the PRC; Choon-Ho Kim, president of KETI; and Nam-Kee Kang, head of KETI’s High Frequency Materials Research Center.

Visit the PRC's Open House to Know about the Emerging and Disruptive Packaging Technologies for the Next Decade

The PRC is seeking industry partners to collaborate on the emerging and disruptive packaging technologies for the next decade, including:

• PCB and Microvia & Global Interconnect for Ultra-High Density, High Frequency Digital Packaging
• Embedded RF Packaging (Embedded Functions, Vertical, Multi-Layer Integration, & MEMS)
• Chip-to-chip Optoelectronics Packaging
• Flip chip and Wafer Level Packaging and Assembly with underfill and Pb-free solders: Design, board Fabrication, Test, Burn-In & Reliability
• Highly Integrated and Multi-function SOP Packaging including Nano Bio-electronics Packaging

Therefore, the PRC plans to host an open house on Wednesday, March 2, 2005 at Georgia Tech's campus in Atlanta . The open house will provide participants with an overview of PRC's research activities, tour of research facilities, and discussion on ways to collaborate. The open house is intended for technical managers, leaders, and executives from industry research & development (R&D) departments interested in learning more about PRC, system-on-package (SOP), and potential collaboration opportunities. More details, including an agenda, and registration, are available at http://www.prc.gatech.edu/news_events/openhouse.

PRC International Cooperation with Hitachi Chemical

(Kenji Tanaka’s article)

Lab picture

EDUCATION

PRC Offers Short Course Series on System-on-Package (SOP) Technology

The Georgia Tech Packaging Research Center (PRC) offers annually a comprehensive set of short courses on System-on-Package (SOP) and next-generation microsystems packaging technologies. This year’s course series consists of individual modules taught by highly respected Georgia Tech PRC faculty. The individual modules are based on the PRC’s System-on-Package vision, which integrates not only digital but also analog, RF, optical and MEMS functions into one ultra-compact and low-cost mixed signal package system to serve the needs of convergent telecom, consumer and computer systems of the next decade. This year’s short course series will focus on three areas:

1. Nano electronics packaging
2. Embedded component thin-film integration of RF, optical, digital and MEMS functions
3. Wafer-level packaging and flip-chip assembly processing

The titles and schedules of the individual modules to be offered are provided in the table below. More information about each course or instructor can be obtained from the web site: http://www.pe.gatech.edu/conted/servlet/edu.gatech.conted.course.ViewCourseDetails?COURSE_ID=493

EVENTS

PRC Celebrates a Decade of Innovations
On September 23, 2004 , Georgia Tech PRC celebrated its tenth year as NSF Engineering Research Center . The event, held at the Georgia Tech Hotel and Conference Center , featured keynote presentations from industry visionaries, academia, and government. Following Jean-Lou Chameau’s (provost of Georgia Tech) and Lynn Preston’s (head of NSF ERC) welcome and their investments in PRC, professor Tummala presented the PRC's new vision for new industry and how its cornerstone concept, "System-on-Package" (SOP), is becoming the new technology platform for digital convergence of computer, communication, consumer and biomedical systems. He described SOP as the 2 nd Moore ’s Law — this time, for system integration, and as the future driving engine for mega-function electronics. He also conveyed the message that SOP and SIP are not identical; the former being system-centric, opposed to the latter, being IC-centric. Georgia Tech’s vice-provost, Charlie Liotta, and dean of engineering, Don Giddens, shared their views of the PRC as the model for other Centers at Georgia Tech.

The next session dealt with local, national and international impacts of the PRC since its inception in 1994. The local impact was addressed by Michael Cassidy, president of the Georgia Research Alliance and J. David Roessner, associate director at SRI International; they concluded that the PRC has been the best model so far with the State of Georgia receiving the equivalent of $9 of benefit for every $1 invested. The U.S. impact of the PRC was presented by IAB officer Len Chorinsinski of Northrop Grumman, Jay McNamara, CEO of Endicott Interconnect Technologies; Herb Reichl, professor and director of Fraunhofer Institute for Reliability and Microintegration; and Chang Chieh Hang, recent deputy chairman of A*Star-Singapore.

Professor Gary May, Georgia Tech, headed up a session on the educational impacts of the PRC and invited Gil Vandentop, manager at Intel, to talk about the quality of PRC engineers hired by Intel. A panel of former PRC students now employed by industry and academia included Nicole Grove, packaging engineer at Freescale; Eric Fitzgerald, engineer at Schlumberger; Hitesh Windlass, Intel; and Jose Cruz-Rivera, University of Puerto Rico-Mayaguez. Each shared testimonials as to the value of the PRC packaging education programs in their successful careers. A combined lunch and poster session led by PRC associate director, Leyla Conrad, provided an opportunity for current PRC students to present their research projects to the 10th anniversary participants.

The most important session involved industry visionaries from computing, communication, semiconductor, consumer and networking giants. Vijay Lund, VP of IBM; Tom MacTavish, VP of Motorola; Stan Lumish, CTO of JDS Uniphase; Nasser Grayeli, VP of Intel; and Choon-Ho Kim, president of KETI-Korea, were the featured keynote speakers. Each reviewed there view of technology for the next decade. Following these visionary talks, the PRC's five research alliance leaders professors Madhavan Swaminathan, Joy Laskar, Gee-Kung Chang, C. P. Wong, and Rao Tummala, reviewed a look back of their team’s innovations in each of their respective research areas.

After a social hour and dinner, Jean-Lou Chameau, master of ceremonies, tipped off the evening introducing celebratory talks by Georgia Tech president, Wayne Clough, who spoke of the PRC's decade of accomplishments; Bill Todd, president and CEO of the Georgia Cancer Coalition, who gave a historical perspective of the PRC; and John Brighton, director of engineering for the NSF, who gave his perspective on the NSF’s ERC program and the PRC's contributions to it. Michael Cassidy spoke again and presented the economic impact of the PRC, as did Nasser Grayeli, who shared the packaging industry's perspective of the PRC’s contributions to new packaging technologies.

A day of talks and festivities ended with special recognition and a plaque presented to Professor Tummala by Georgia Tech PRC faculty, research and administrative staff, for a decade of leadership and achievements. This presentation was followed by his expressions of gratitude to numerous people and organizations who supported the PRC and contributed to its success over the past decade. Several gifts and recognitions were presented by Professor Tummala to recipients throughout the day as appreciation for their exceptional support and dedication.

Nano & Bio-Electronic Packaging Workshop
March 22-23, 2005 , Atlanta , Georgia

The second International Workshop on Nano & Bio-Electronic Packaging will be held at the Georgia Tech Technology Square Research Building, March 22 and 23, 2005.

Titles and abstracts are due November 12, 2004 . Those interested in submitting an abstract and/or attending the workshop , please visit and register online at www.prc.gatech.edu/nanobiopack

First International Workshop on 3S (SOP, SIC, SOC) Electronic Technologies
September 22 & 23, 2005
Global Learning & Conference Center at Technology Square
84 Fifth Street, Atlanta, GA 30308 USA

The SOP paradigm changes the current chip-centric SOC methodology to a cheaper, faster-to-market IC-package-system co-design flow. The advantages of the SOP paradigm over SOC appear overwhelming due to SOP’s design simplicity, lower cost and higher system function integration, electrical performance, without the intellectual property issues that dominate SOC. SOP is also different from, and offers advantages over, 3D packaging and SIP. The 3D packaging is typically stacking of similar, or dissimilar, chips such as DRAM S. SIP goes beyond to embed both actives and passives but the passives are discrete, thick and bulky components. SOP goes one step further in the ultimate 3D integration of components in thin film form at microscale, in the short term, and nanoscale in the long term. SOP focuses on integrating both single function as well as heterogeneous system functions, optimizing ICs for transistors and package for integration of digital, RF, optical, sensor and others. It accomplishes this by both build-up SOP—similar to ICs—and stacked SOP, which is similar to parallel board fabrication.

This workshop reviews the latest R & D and manufacturing status of each of the three electronic technologies around the world. It will also attempt to compare and contrast SOC, 3D stacking, SIP, SOP and MCM.

For registration and continuously updated info, visit: www.prc.gatech.edu/3s