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9:30~10:00 AM - Get together at Morning Coffee and Beverages, MaRC Atrium

10:00 AM~12:00 Noon: One-on-One Meetings on Company Projects

Member Companies - PRC Faculty, Project Leaders and Students/Engineers

ATOTECH - Prof. Tummala, Venky Sundaram and Hunter Chan

Intel - Profs. Chang and Tummala and Fuhan Liu

NTK - Prof. Tummala, Raj Pulugurtha and

IBM - Prof. Sitaraman and Prof. Swaminathan

STW - Profs. Wong and Sitaraman, and Jack Moon

Rogers - Prof. Tummala, and Fuhan Liu

SAMMEER - Profs. Tummala and Swaminathan, and Venky Sundaram

SONY - Prof. Swaminathan       

Indium - Prof. Wong and Jack Moon

Lunch: 12:00~1:00 PM, MaRC Atrium

(See afternoon schedule for remaining activities.)

8:00 – 8:30 AM - Continental Breakfast

8:30 – 8:45 AM - Welcome and Objectives – Prof. Rao Tummala

8:45 – 9:15 AM - EMAP Program Year 2 Integration Summary, Timeline, Accomplishments, and Challenges – Venky Sundaram

SESSION 1 Year 2 Integration Test Vehicles Accomplishments and Status – Venky Sundaram and Prof. Rao Tummala

TASK 1: Electrical Design, Characterization and Embedded RF Passives

9:15 – 9:45 AM

Power/Ground and Transmission Line Design - Prof. Swaminathan, Nithya Sankaran

9:45 – 10:30 AM

Materials Characterization & Embedded Passives Test Vehicle Design - Prof. Swaminathan, Eddy Hwang

Coffee Break 10:30 – 10:45 AM

TASK 7: EMBEDDED ACTIVE TV Fabrication and Assembly

10:45 – 11:45 AM

Ultra-Thin Substrate Overview – Fuhan Liu

Thin Core Substrate – Hunter Chan

Build-up Dielectric Materials and Processes – Fuhan Liu

Lunch 12:00 – 1:00 PM

Registration: 11:30 AM~12 Noon, MaRC Atrium

Lunch: 12:00~1:00 PM, MaRC Atrium

1:00~1:20 PM: Welcome and Introduction—Prof. Yogendra Joshi

1:20~4:45 PM - Session 1: TIM Research Projects Review—Chair, Profs. Bahgat Sammakia and Jianmin Qu

• Task 1: TIM Materials and Interfaces
• Project 1.1: The Development of Aligned Carbon Nanotube Films For                                              Thermal Interface Material Applications—Profs. C. P. Wong and Samuel Graham (50 min)

• Task 4: TIM Reliability:
• Project 4.1: Design for Reliability of Thermal Interface Materials—Prof. Suresh Sitaraman (25 min)

Coffee Break: 2:35~3:05 PM

• Task 2 and 3: TIM Assembly and Bonding, and Characterization of TIM
  • Project 2.1: Assembly and Testbed Research with Metal and Metal Composite TIM—Dr. Raj Pulugurtha, Gopal Jha, Janagama Goud and Prof. Rao Tummala (25 min)
  • Project 3.1: Thermal and Thermomechanical Modeling and Characterization of TIMs and Their Interfaces—Profs. Yogendra Joshi, Bahgat Sammakia and Jianmin Qu (75 min)
• 4:45~5:30 PM:

Session 2: Year 2 plans and Wrap-up Discussion-- Chair, Prof. Yogendra Joshi

Industry Dinner: 6:15PM, Gordon Bierch Restaurant

1:30pm – 2:00pm Welcome and Overview – Prof. Madhavan Swaminathan

SESSION 1: EDA for Digital and Mixed Signal

2:00pm – 2:15pm Overview – Prof. Madhavan Swaminathan

2:15pm – 2:40pm MSDT 1: Power Ground Network Simulator and Optimizer
Technical Presentation – Krishna Bharath (20 min)
Q&A (5 min) 

2:40pm – 3:05pm MSDT 2: Design for Manufacturing Methods for SiP
Technical Presentation – Ranjeeth Doppalapudi (20 min)
Q&A (5 min)

3:05pm – 3:30pm MSDT 5: EBG Modeling and Synthesis
Technical Presentation – Bernie Jord Yang (20 min)
Q&A (5 min)

3:30pm – 3:45pm Break

3:45pm – 5:15pm Demo (MSDT 1, 2 and 5)
5:15pm – 6:15pm Poster Session
6:30pm Dinner (Georgia Tech Hotel or elsewhere - TBD)

1:00~4:45PM – Research Programs Review and Business Meeting
Chair, Frank Pompeo, IBM

1:00~1:30 PM SESSION 1 - Welcome, PRC Programs, PRC Team and Research Highlights - Prof. Rao Tummala

1:30~4:45 PM SESSION 2 - Review of Base SOP Company Projects

Session A  1:30~2:15 PM, SOP Design: Chair, Dr. M. Swaminathan

• Paper 1 - “Correlation of PDN Impedance with Jitter and Voltage Margin-SONY”, Prof. Swaminathan (15 min)
• Paper 2 - “High Density Packaging and SOP Test Vehicle and Technology Test Vehicles-SAMEER”, Venky Sundaram and Profs. Swaminathan and Tummala (15 min)
• Paper 3 - New Project: “DC Modeling and Tool Development for 3D Silicon Packaging” –IBM, Prof. Swaminathan (15 min)

Session B  2:15~3:00 PM, SOP Substrate Integration: Chair, Venky Sundaram

• Paper 4: “Micro-vias and Fine Lines on ATOTECH RCF and RRCF-ATOTECH”, Hunter Chan, Venky Sundaram and Prof. Tummala (15min)
• Paper 5 “Low Loss Thin Film Build-up Dielectrics for Next Generation Package Substrates-Rogers”, Fuhan Liu, Venky Sundaram and Prof. Tummala (15 min)
• Paper 6 “High Density Optical Interconnects-Intel”, Prof. Chang (15 min)

Coffee and Break: 3:00~3:15 AM

Session  C: 3:15~3:45 PM, Interconnection and Assembly, Chair, Raj Pulugurtha

• Paper 7 - “Electrical Reliability of Sol-gel BT Capacitor on Copper Foil-NTK/NGK”, Raj Pulugurtha, and Prof. Tummala (15 min)
• Paper 8 - “Fine Pitch Flip Chip Packaging with Cu-based Interconnections, Raj Pulugurtha, Janagama Goud and Prof. Tummala (15 min)

Session D  3:45~4:45 PM, Materials and Reliability, Chair, Jack Moon

• Paper 9 - “Warpage Prediction and Analysis – STW", Jack Moon and Prof. Wong (15 min)
• Paper 10 - “ECA-Indium”, Jack Moon and Prof. Wong (15 min)
• Paper 11 - New Project: "Coupled Moisture and Thermal Modeling" – IBM Prof. Sitaraman (15 min)

4:45~5:35 PM SESSION 3  PRC Membership Administration
Chair, Prof. Rao Tummala

• New Graduated Scale Membership Structure – Mr. Dean Sutter – 20 Minutes

5:35~6:00 PM SESSION 4: Discussion & Wrap UP
Chair, Frank Pompeo, IBM

Q&A: Profs. Tummala and Swaminathan, and Dean Sutter

6:15-7:00PM   Industry Social and Dinner:

Gordon Biersch Restaurant
848 Peachtree Street, NE
Atlanta, GA 30308

Gordon Bierch Restaurant

(Transportation Provided as Needed)