Undergraduate Research

One of the factors limiting the numbers of undergraduate students going on to graduate school is a lack of familiarity with the research process. It is well-established that a key factor for motivating students to pursue advanced degrees and research careers in science and engineering is a fruitful research experience as an undergraduate. Such experiences can be highly effective in helping students who exhibit uncertainty or a lack of confidence regarding attending graduate school. Moreover, experience in research enhances a student's competitiveness for graduate school admission and national fellowships. The PRC involves talented undergraduates in research experiences. One component of the program will consist of research experiences during the academic year, while the other component of the program will bring in rising junior and senior students from various institutions nationwide to participate in summer research experiences at Georgia Tech. A third component will involve undergraduates undertaking research projects at U.S. universities nationwide and then presenting their work at the annual International Microelectronics and Packaging Society (IMAPS) Technical Symposium and Exhibition.

Examples of Undergraduate Research Projects

The Study of Adhesion in Polymer Underfills for Electronic Packaging Applications
Tsuyoshi Yamashita
Faculty Advisor: Dr. C.P. Wong
Adhesion is a major concern for underfills in the electronic packaging industry. This poster presents an outline of the experimental procedures proposed for the 1999-2000 school year studying this topic. Surface tension, surface morphology, chemical bonding, and adhesion promoters all play a role in the adhesion of underfills. Testing methods and theoretical background needed for their interpretation are given.

Multilayer Planarization of Polymer Dielectrics
Brian P. Dusch
Faculty Advisor: Prof. Paul Kohl
Thin film deposited interlevel dielectrics are widely used in the microelectronics industry as insulating layers between metal lines, and as passivation layers on active devices. One of the key concerns is the ability to planarize the underlying topography at each polymer layer. In this study, the degree of planarization (DOP) for six commercially available polymers was examined for multilayer planarization after a thermal cure process. The polymers were selected to investigate different backbone structures frequently used in the microelectronics industry. Furthermore, this study also included the effect of a novel cure technique involving electron beam exposure on multilayering and planarization behavior. The underlying structures were fabricated using standard photolithography and electroplating techniques. Feature dimensions include 25-200µm-line spacing and widths at different locations on the substrate with polymer overcoat thicknesses twice the height of the underlying structures. The issues of first layer swelling and dissolution during deposition of the second layer are important. Planarization is an important property of dielectric layers, particularly when constructing multilayer structures.

Large Area Meniscus Coating
Robert Madayag and Torrey Edwards
Faculty Advisor: Dr. Swapan Bhattacharya and Profs. Gary May and Edward Kamen
Collaborators: Sachin Bhatevara, Sherlon Kauffman, Hector Morales
This project presents theories, operation, and applications associated with large area (600 mm x 600 mm) meniscus coating. The goals of our project are the development of a fully functional, cost effective, expandable meniscus coating process with increased throughput through integration with a robotic sample handling system. Our actions toward this goal have encompasses both defect analysis and time studies, all in coordination with the other current and past members of the development team. Through these analyses and studies, we are investigating the feasibility, operability, and sustainability of the process using several different coatings on several different substrates. The project goals and our actions will be illustrated on the poster in further detail. Also included in the project display will be summaries of the deposition process, advantages of the process, and theories of operation.

Process Modeling for Decisions in Substrate Manufacturing
Samuel Merriweather Faculty Advisor: Prof. Matthew Realff
Since the 1994 establishment of the PRC, research strategies including low cost materials, large area processing and low capital investment have been explored in an effort to reduce packaging costs. An accurate cost model is needed to evaluate these strategies and to help focus research efforts on high cost parts of the process. A discrete event simulation model has been developed to evaluate the SLIM prototype process. The model has been built in a hierarchical modular fashion for ease of presentation and modification. The modeling of resources, such as labor and equipment, is general so that larger-scale production facilities can be modeled within the same structure. The variable nature of the layers has been explicitly represented so that it is easy to model packages with or without integrated passives with different numbers of interconnect layers. Cost figures for the SLIM process inputs have been added into the model to estimate the overall production costs for substrates. The simulation model provides a better understanding of the process flow, a list of bottlenecks within the system, and a foundation for cost modeling.

CDMA Transceiver Design and Prototype Project
Mano Timajchy
Faculty Advisor: Prof. J. Laskar
The project gives practical design experience to undergraduate students in prototyping a transceiver in the PCS-band (1.91-1.93GHz) with a CDMA modulation scheme. The project goals are to: 1) optimize the architecture of CDMA; 2) investigate/develop techniques for digital wireless communications at high data rates; and 3) prototype a transceiver from off-shelf available components in today's market. We are currently in the process of testing each component received from several vendors. Our tests results will be compared with manufacturer's data.

Optical Interconnections: Diffractive Waveguide Coupler
Stephen M. Schultz and Ricardo Villalaz
Faculty Advisor: Profs. Thomas Gaylord and Elias Glytsis
In this poster, we present a focusing preferential-order volume grating coupler. Integrated optics applications require the coupling of light into and out of optical waveguides. Diffraction gratings provide a compact means of producing this coupling. However, high efficiency coupling must be produced by reducing the power diffracted into undesired orders. This is called preferential-order coupling. In addition, it is advantageous to integrate focusing into the coupler, thus eliminating the need for additional components in the system. The coupler preferential-order grating coupler presented here performs 2-D focusing.